Support MiniMax M3 CPU KVStore

[FlamingoPg]

Summary

• mirror MSA index-key pages through the flat CPU L2 tier
• include auxiliary page buffers in host-page sizing and D2H/H2D transfers
• fence sparse layers on their index-cache load event while dense layers remain fenced on V
• enable KVStore in the MiniMax M3 recipe

Why

MiniMax M3 stores an additional index_k_buffer for each sparse-attention layer. The flat host mirror previously transferred only K/V and recurrent state, so an L2 loadback restored K/V but left the MSA index cache stale. Host-page sizing also omitted roughly 47.5% of M3's per-rank cache bytes.

The flat mirror now supports a model-neutral, layer-aligned auxiliary page-buffer protocol. M3 publishes its index-key pages through that protocol; the generic executor does not contain a MiniMax-specific branch.

Validation

• pre-commit run --all-files
• CUDA_VISIBLE_DEVICES=4 PYTHONPATH=python:tokenspeed-kernel/python .venv/bin/python -m pytest -q test/runtime/test_flat_host_mirror.py test/runtime/test_flat_host_executor.py test/runtime/models/test_minimax_m3.py
  • 26 passed
• TP4 MiniMax-M3-MXFP8 flat-L2 eviction/loadback smoke on 4×B200:
  • --max-total-tokens 8192 --max-model-len 4096 --block-size 128 --kvstore-ratio 2.0 --enforce-eager
  • host allocation: 129 pages × 5,799,936 bytes/page per rank
  • round 1: 0 / 12,288 cached tokens
  • round 2: 2,944 / 3,072 cached tokens for each of four prompts (95.83%)
  • observed both WriteBackDoneEvent and LoadBackDoneEvent
  • greedy output matched byte-for-byte for all four prompts across cold prefill and L2 loadback