About: NAR 2

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32-bit RISC architecture developed by Nedeljko Parezanović

Property	Value
dbo:description	32-bitna RISC arhitektura, ki jo je zasnoval Nedeljko Parezanović (sl) 32-bit RISC architecture developed by Nedeljko Parezanović (en)
dbo:wikiPageExternalLink	http://www.matf.bg.ac.rs/~jtomasevic/linkovi/ors/primeri.pdf
dbo:wikiPageWikiLink	dbr:Bit dbr:Jump_instruction dbr:English_language dbr:Serbia dbr:Index_register dbr:Logical_disjunction dbr:Branch_(computer_science) dbr:Most_significant_bit dbr:Assembly_language dbr:Serbian_language dbr:Computer_architecture dbr:Pomegranate dbr:Logical_connective dbr:University_of_Belgrade dbr:Program_counter dbr:Opcode dbr:Accumulator_(computing) dbr:Plum dbr:Logical_shift dbr:MMIX dbr:Logical_conjunction dbr:Negation dbr:Fixed-point_arithmetic dbr:Addressing_mode dbr:NAR_1 dbc:Models_of_computation dbr:Flag_(computing) dbr:Machine_language dbr:Central_Processing_Unit dbr:Bitwise_operations dbr:Instruction_(computer_science) dbr:Nedeljko_Parezanović
dbp:wikiPageUsesTemplate	dbt:Short_description dbt:Serbian_computers
dct:subject	dbc:Models_of_computation
gold:hypernym	dbr:Model
rdfs:label	NAR 2 (en)
owl:sameAs	freebase:NAR 2 yago-res:NAR 2 wikidata:NAR 2 dbpedia-sr:NAR 2 dbpedia-global:NAR 2
prov:wasDerivedFrom	wikipedia-en:NAR_2?oldid=1235730138&ns=0
foaf:isPrimaryTopicOf	wikipedia-en:NAR_2
is dbo:wikiPageDisambiguates of	dbr:Nar
is dbo:wikiPageWikiLink of	dbr:List_of_computer_systems_from_the_Socialist_Federal_Republic_of_Yugoslavia dbr:Nar dbr:MMIX dbr:Addressing_mode dbr:NAR_1
is foaf:primaryTopic of	wikipedia-en:NAR_2

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