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dbr:Pin_grid_array . @prefix rdfs: . dbr:Field-programmable_gate_array rdfs:seeAlso dbr:Hardware_acceleration . @prefix dbpedia-eu: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-eu:Ate-matrize_programagarri . @prefix dbpedia-et: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-et:FPGA . @prefix dbpedia-el: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-el:FPGA . @prefix dbpedia-simple: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-simple:Field-programmable_gate_array . @prefix dbpedia-ja: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-ja:FPGA . @prefix dbpedia-he: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-he:FPGA . @prefix dbpedia-ca: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-ca:Matriu_de_portes_programable_in_situ . @prefix dbpedia-ro: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-ro:FPGA , . @prefix wikidata: . dbr:Field-programmable_gate_array owl:sameAs wikidata:Q190411 . @prefix dbpedia-ko: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-ko:FPGA . @prefix dbpedia-de: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-de:Field_Programmable_Gate_Array . @prefix dbpedia-no: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-no:FPGA , . @prefix dbpedia-tl: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-tl:FPGA . @prefix dbpedia-da: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-da:Field-Programmable_Gate_Array . @prefix dbpedia-sr: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-sr:FPGA . @prefix dbpedia-fi: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-fi:FPGA . @prefix dbpedia-eo: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-eo:Agordebla_Matrico_de_Logikaj_Elementoj , . @prefix dbpedia-es: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-es:Field-programmable_gate_array , , . @prefix yago-res: . dbr:Field-programmable_gate_array owl:sameAs yago-res:Field-programmable_gate_array . @prefix dbpedia-it: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-it:Field_Programmable_Gate_Array , . @prefix dbpedia-global: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-global:pFcG . @prefix dbpedia-sk: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-sk:Field_programmable_gate_array . @prefix dbpedia-mk: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-mk:FPGA . @prefix dbpedia-hu: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-hu:Field-programmable_gate_array , , , . @prefix dbpedia-gl: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-gl:Field-programmable_gate_array , . @prefix dbpedia-id: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-id:FPGA , . @prefix dbpedia-nn: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-nn:FPGA . @prefix dbpedia-uk: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-uk:FPGA , , dbr:Field-programmable_gate_array . @prefix dbpedia-nl: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-nl:Field-programmable_gate_array . @prefix dbpedia-sv: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-sv:Field-programmable_gate_array . @prefix dbpedia-vi: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-vi:FPGA . @prefix dbpedia-bar: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-bar:Field_Programmable_Gate_Array . @prefix dbpedia-bg: . dbr:Field-programmable_gate_array owl:sameAs dbpedia-bg:FPGA , , ; rdfs:label "Field-programmable gate array"@nl , "Programovateln\u00E9 hradlov\u00E9 pole"@cs , "FPGA"@ko , "\u73B0\u573A\u53EF\u7F16\u7A0B\u903B\u8F91\u95E8\u9635\u5217"@zh , "\u041F\u0440\u043E\u0433\u0440\u0430\u043C\u043C\u0438\u0440\u0443\u0435\u043C\u0430\u044F \u043F\u043E\u043B\u044C\u0437\u043E\u0432\u0430\u0442\u0435\u043B\u0435\u043C \u0432\u0435\u043D\u0442\u0438\u043B\u044C\u043D\u0430\u044F \u043C\u0430\u0442\u0440\u0438\u0446\u0430"@ru , "Matriu de portes programable in situ"@ca , "FPGA"@ja , "Field-programmable gate array"@es , "Field Programmable Gate Array"@de , "Agordebla Matrico de Logikaj Elementoj"@eo , "FPGA"@el , "FPGA"@uk , "Field-programmable gate array"@sv , "Ate-matrize programagarri"@eu , "Arranjo de porta program\u00E1vel em campo"@pt , "Bezpo\u015Brednio programowalna macierz bramek"@pl , "FPGA"@in , "Field-programmable gate array"@en , "Field Programmable Gate Array"@it , "\u0645\u0635\u0641\u0648\u0641\u0629 \u0627\u0644\u0628\u0648\u0627\u0628\u0627\u062A \u0627\u0644\u0645\u0646\u0637\u0642\u064A\u0629 \u0627\u0644\u0642\u0627\u0628\u0644\u0629 \u0644\u0644\u0628\u0631\u0645\u062C\u0629"@ar . @prefix dct: . @prefix dbc: . dbr:Field-programmable_gate_array dct:subject dbc:Hardware_acceleration , dbc:Gate_arrays , dbc:Integrated_circuits , dbc:OpenCL_compute_devices , dbc:Semiconductor_devices , dbc:Field-programmable_gate_arrays , dbc:American_inventions ; foaf:depiction , , , , . @prefix prov: . dbr:Field-programmable_gate_array prov:wasDerivedFrom ; dbo:wikiPageWikiLink dbr:Assembly_language , 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, dbr:AND_gate , dbr:Hardware_description_language , dbr:Vertical_application , dbr:Interposer , dbr:Performance_per_watt , , dbr:Semiconductor_intellectual_property_core , dbr:SystemVerilog , dbc:Gate_arrays , dbc:Hardware_acceleration , dbr:Clock_domain_crossing , dbr:CPU_architecture , dbr:Combinational_logic , dbr:Atmel , dbr:Flash_memory , dbc:Field-programmable_gate_arrays , dbr:Field-programmability , dbr:Dual-ported_RAM , dbr:Proprietary_software , dbr:Data_center , dbr:Programmable_system-on-chip , dbr:Hardware_acceleration , dbr:Low-power_electronics , dbr:Computer_network . @prefix ns43: . dbr:Field-programmable_gate_array dbo:wikiPageWikiLink ns43:O_address , dbr:Heterogeneous_computing , dbr:Binary_multiplier , dbr:Intel_Quartus_Prime , dbr:Xilinx_Vivado , dbr:Xilinx_ISE , , , dbr:Computer_performance , dbr:Differential_signaling , dbr:Timing_analysis , dbr:Cloud_computing , dbr:Clock_frequency , dbr:Non-volatile_memory , dbr:Boolean_function , dbr:Access_key , dbr:Shannon_expansion , dbr:Medium_access_control , dbr:Crystal_oscillator , dbr:Propagation_delay , dbr:Gigahertz , dbr:Electrical_resonance , dbr:SerDes , dbr:Multi-gigabit_transceiver , dbr:High-_and_low-level , , dbr:Achronix , dbr:Computer_architecture , dbr:CMOS , dbr:Microsoft_Azure , dbr:Computability , dbr:Booting , dbr:Soft_microprocessor , dbr:Analog-to-digital_converter , dbr:Verification_and_validation , dbr:Bitstream , dbr:FPGA_Mezzanine_Card , dbr:AI_accelerator , , dbr:Microprocessor , dbr:Encryption , dbr:PCI_Express , dbr:Joint_Test_Action_Group , dbr:Comparator , dbr:Non-recurring_engineering , dbr:Printed_circuit_board , dbr:List_of_HDL_simulators , dbc:Integrated_circuits , dbr:Central_processing_unit , dbc:American_inventions , dbr:SmartFusion , dbr:Computer_memory , dbr:Delay-locked_loop , ; dbo:description "\u30D7\u30ED\u30B0\u30E9\u30DF\u30F3\u30B0\u53EF\u80FD\u306A\u96C6\u7A4D\u56DE\u8DEF"@ja , "\u0447\u0438\u043F, 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